Proceedings of the 12th IEEE Mediterranean Electrotechnical Conference, MELECON 2004, Dubrovnik, Hırvatistan, 12 - 15 Mayıs 2004, cilt.1, ss.95-98, (Tam Metin Bildiri)
This work presents the effect of slew-rate on first order, switched capacitor, Sigma-Delta (SD) analog-to-digital converters (ADC). The slew-rate can be a significant problem for SD ADC's. Thus it should be related to the input signal for accurate estimation of the error produced by the slewing amplifier. In this work, the effects of the signal histogram and its frequency spectrum have been analyzed. Different cases have been presented in order to illustrate the effect. Also, a model for estimating the error caused by the slew-rate has been proposed.