Jitter model of Sigma-Delta A/D converters Sigma-Delta A/D Çeviricilerinin Seǧirme Modeli

Talay S., DÜNDAR G.

Proceedings of the IEEE 12th Signal Processing and Communications Applications Conference, SIU 2004, Kusadasi, Türkiye, 28 - 30 Nisan 2004, ss.371-374, (Tam Metin Bildiri) identifier

  • Yayın Türü: Bildiri / Tam Metin Bildiri
  • Basıldığı Şehir: Kusadasi
  • Basıldığı Ülke: Türkiye
  • Sayfa Sayıları: ss.371-374
  • Boğaziçi Üniversitesi Adresli: Evet

Özet

This work presents a recently developed jitter model for Sigma-Delta analog-to-digital converters. The presented work enables the designers to choose more appropriate hardware or estimates the performance of the available hardware with given input signal spectrum. The accuracy of the developed system has been presented with examples. © 2004 IEEE.