Area optimization on fixed analog floorplans using convex area functions

UNUTULMAZ A., DÜNDAR G., Fernández F.

16th Design, Automation and Test in Europe Conference and Exhibition, DATE 2013, Grenoble, Fransa, 18 - 22 Mart 2013, ss.1843-1848, (Tam Metin Bildiri) identifier

  • Yayın Türü: Bildiri / Tam Metin Bildiri
  • Doi Numarası: 10.7873/date.2013.368
  • Basıldığı Şehir: Grenoble
  • Basıldığı Ülke: Fransa
  • Sayfa Sayıları: ss.1843-1848
  • Boğaziçi Üniversitesi Adresli: Evet

Özet

A methodology to optimize the area of a fixed non-slicing floorplan is presented in this paper. Areas of transistors, capacitors and resistors are formulated as convex functions and area is minimized by solving a sequence of convex problems. The methodology is practical even with many components and variants. Moreover symmetry constraints are satisfied during optimization. © 2013 EDAA.