A rare event based yield estimation methodology for analog circuits

Odabaşi I. Ç., Yelten M. B., Afacan E., BAŞKAYA İ. F., PUSANE A. E., DÜNDAR G.

21st IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2018, Budapest, Macaristan, 25 - 27 Nisan 2018, ss.33-38, (Tam Metin Bildiri) identifier identifier

  • Yayın Türü: Bildiri / Tam Metin Bildiri
  • Doi Numarası: 10.1109/ddecs.2018.00013
  • Basıldığı Şehir: Budapest
  • Basıldığı Ülke: Macaristan
  • Sayfa Sayıları: ss.33-38
  • Anahtar Kelimeler: Analog circuits, Parametric faults, Process variations, Rare event, Yield estimation
  • Boğaziçi Üniversitesi Adresli: Evet

Özet

With the growing use of analog circuits in sensor systems for internet of things applications, estimation of their yield has become critical in order to increase the efficiency of large volume manufacturing. In this paper, a methodology to estimate the yield of analog circuits beyond 95% is proposed. The methodology is based on an algorithm that uses adaptive sampling to approach the 'tail' region of the initial distribution which contains the dysfunctional units. These units do not satisfy the initial design targets thereby lowering the yield. An inverter and a two-stage operational amplifier have been used to verify the methodology where the reference distribution is based on 106 samples for both circuits. Simulation results reveal that the accuracy for 95%, 98%, and 99% yield has been compromised by less than 2.1%, 5.7%, and 7.4%, respectively, whereas the computation cost is reduced by 20×.