Proceedings - 2004 NASA/DoD Conference on Evolvable Hardware, Seattle, WA, Amerika Birleşik Devletleri, 24 - 26 Haziran 2004, ss.26-29, (Tam Metin Bildiri)
An evolutionary approach to automatic synthesis of analog integrated circuits and systems is presented in this paper. An essential feature of this system is a high performance optimization algorithm based on the combination of evolutionary strategies and simulated annealing. As required by analog circuit synthesis, modeling of DC parameters is done via a fast DC simulator developed for this purpose whereas modeling of AC parameters is done either with user-defined equations or with neural-fuzzy performance models trained from SPICE simulations. Another feature of the system is the incorporation of matching properties of devices. The synthesis system has been applied to a number of design cases with demonstrated validity on silicon. The synthesis approach is also considered at the system level for potential analog VLSI applications.