Akademik Veri Yönetim Sistemi
Integration, the VLSI Journal, cilt.55, ss.366-375, 2016 (SCI-Expanded, Scopus)
We propose a simulation-based analog equivalence boundary search methodology for high level Simulink models and their low level HSpice counterparts. The equivalence of high and low level designs is determined by comparing a set of predefined performance parameters measured during the simulation of both models. Our methodology investigates the search space to obtain boundary of input parameters, where both models have equivalent performance parameters. We build an optimization problem, where the error percentage between the performance parameters of both models being less than a specified threshold is defined as success criteria. In this problem, input parameters are determined by utilizing evolutionary computation. At the end of the optimization, the border of equivalence for the models is found for input parameters satisfying the success criteria. We demonstrate the validity of our approach on three designs, an inverter, an operational amplifier, and a buck converter, where our approach proves to be an efficient tool in finding an equivalence boundary of analog circuits and models.