Compact model based design space exploration for CMOS hall effect sensors

Aksoyak I. K., Balaban K., Torun H., DÜNDAR G.

14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2017, Giardini Naxos, Taormina, İtalya, 12 - 15 Haziran 2017, (Tam Metin Bildiri) identifier

  • Yayın Türü: Bildiri / Tam Metin Bildiri
  • Doi Numarası: 10.1109/smacd.2017.7981591
  • Basıldığı Şehir: Giardini Naxos, Taormina
  • Basıldığı Ülke: İtalya
  • Anahtar Kelimeler: Hall plate, Hall voltage, resolution, sensitivity, signal to noise ratio
  • Boğaziçi Üniversitesi Adresli: Evet

Özet

This paper presents an analytical model for Hall Plates. The model includes the calculation of some key features such as Hall voltage, resolution, sensitivity, and signal-to-noise ratio (SNR) for different device geometries. The model is used to determine the device geometries for the best optimization parameters in the design of Hall plates. The model is validated with the measurements taken from a Hall Plate.